1. Field of the Invention
The present invention relates to the field of computer systems. More specifically, the present invention relates to forwarding buffered store data on an out-of-order execution computer system.
2. Background
Store buffers have been employed in the art on in-order execution computer systems for buffering memory store operations, thereby freeing the central processing unit (CPU) to continue to execute other instructions without having to wait for the actual completion of memory store operations. In order to avoid incorrect data being returned for memory load operations, typically the entire store buffer is checked for address conflicts for each memory load operation. If at least one address conflict is detected, the memory load operation is blocked and the entire store buffer is flushed, causing all the buffered memory store operations to be performed immediately. In the meantime, the memory load operation remains blocked and the CPU waits while the flush operation is being performed. The memory load operation is unblocked at the end of the flush operation, and the CPU resumes execution upon return of the data being loaded.
Typically, the address conflict checks are performed using physical addresses, because memory locations are referenced with physical addresses and accordingly the memory store operations are buffered with physical addresses. In other words, in a virtually addressed in-order execution computer system, the address conflict checks are generally performed after the virtual address of a memory load operation has been translated into physical address. Alternatively, the address conflict checks can be performed using the identical portions of the virtual and physical addresses, thereby allowing the checks to be performed earlier before the translation of the virtual address of a memory load operation is completed. While some of the flushes will be unnecessary, since multiple virtual addresses can map to the same physical address, nevertheless there could be a net performance gain from being able to start the flush operations earlier.
Additionally, in some prior-art in-order execution computer systems, the data of the youngest address conflicting buffered memory store operation is also by-passed to the CPU, thereby allowing earlier unblocking of the memory load operation and resumption of execution by the CPU. Since the memory store operations are executed in order, the youngest address conflicting buffered memory store operation always precedes the memory load operation. Thus, its data is the appropriate buffered store data to be forwarded.
However, on an out-of-order execution computer system, because not all buffered memory store operations are necessarily in processor or retirement ready states, a flush operation cannot be initiated whenever address conflicts are detected for a memory load operation. In fact, on an out-of-order execution computer system where the address and data aspects of a memory store operation are performed separately, some buffered memory store operations may not even be in speculatively executed states, which precede the processor or retirement ready states. For these buffered memory store operations, there are no store data available for forwarding. Furthermore, on an out-of-order execution computer system, the youngest of all address conflicting buffered memory store operations does not necessarily always precede the memory load operation. Thus, its store data is not necessarily the appropriate buffered store data to be forwarded.
For the purpose of this application, retirement ready state is synonymous with process ready state, and it means the associated data are ready to be committed and made visible to system elements external to the out-of-order execution unit.
Therefore, it is desirable to be able to appropriately forward buffered memory store data on an out-of-order execution computer system. In particular, on an out-of-order execution computer system where the address and data aspects of a memory store operation are performed separately. Since performance is typically paramount on these computer systems, this forwarding ability is especially desirable on an out-of-order execution computer system with limited number of general purpose registers, where there will be a lot of memory store operations intermixed with memory load operations involving the same registers. As will be disclosed, the present invention provides for a method and apparatus for forwarding buffered store data on an out-of-order execution computer system that advantageously achieves these and other desirable results.